Description
We’re seeking a talented Hardware Design Engineer to contribute to the development and verification of advanced digital designs. You’ll work on cutting-edge ASIC and FPGA solutions, collaborating closely with cross-functional teams to bring next-generation technology to life. The position follows a flexible hybrid schedule.
Responsibilities
- Participate in design architecture discussions and trade-off analysis.
- Write and verify RTL code for high-performance hardware components.
- Support hardware bring-up and provide technical assistance during customer engagements.
Qualifications
- Proficient in SystemVerilog for digital design.
- Familiar with verification tools such as Questa, Incisive, or VCS.
- Experience with scripting (Python, Perl, Tcl) for process automation.
- Solid understanding of ASIC or FPGA logic design.
- Strong self-management, communication, and organizational skills.
- 5+ years of logic design experience and a BSEE degree.
Preferred / Plus
- Experience with ASIC synthesis, timing constraints, CDC/RDC flows.
- Exposure to verification methodologies such as UVM.
- Familiarity with AMBA and AXI protocols.
Company
FortifyIQ is a hardware-security boutique delivering configurable cryptographic IP cores and software libraries, along with roots of trust, designed for devices from ultra-constrained IoT to high-performance servers. The firm emphasizes post-quantum readiness, SCA/FIA resistance, and tailored trade-offs in area, power, and performance to meet each device’s priorities.
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